The scaling down of integrated circuit devices has created a need to incorporate high dielectric constant (i.e., high dielectric permittivity) materials into capacitors and gates. The search for new high dielectric constant materials and processes is becoming more important as the minimum size for current technology is practically constrained by the use of standard dielectric materials.
Tantalum pentoxide (e.g., Ta2O5) has found interest as a high dielectric permittivity material for applications such as DRAM capacitors because of its high dielectric constant (e.g., 30) and low leakage currents. Even further interest has been directed to crystalline tantalum pentoxide for such applications, because thin films of crystalline tantalum pentoxide have dielectric constants of 60, which is about twice the dielectric constant of thin films of amorphous tantalum pentoxide. For example, tantalum pentoxide has been deposited on metallic ruthenium having a hexagonal close-packed structure to form a crystallographically textured tantalum pentoxide layer. However, because a ruthenium surface can be easily oxidized, and the oxidized surface can inhibit the formation of crystalline Ta2O5, extra measures are typically required to control the nature and composition of the ruthenium surface before and/or during the deposition process.
New methods of preparing high dielectric constant films are being sought for current and new generations of integrated circuit devices.
The following description of various embodiments of the methods as described herein is not intended to describe each embodiment or every implementation of such methods. Rather, a more complete understanding of the methods as described herein will become apparent and appreciated by reference to the following description and claims in view of the accompanying drawing. Further, it is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the present disclosure.